Edge Sensitive Path
Formal Definition
The edge sensitive path is a module path described with an edge
transition at the source.
Simplified Syntax
Paralel_path:
([edge_identifier] input_terminal =>
output_terminal [polarity]:data_source) = delays;
Full_path :
([edge_identifier] input_terminal *>
output_terminal [polarity]:data_source) = delays;
Edge identifier:
posedge
negedge
Polarity:
+ -
Description
The edge sensitive path is the same as simple module path. The
difference is that in the edge sensitive path, the source edge
transition is used. The edge identifier can be either a posedge
or a negedge. If an input is
declared as a vector port then the least significant bit is used to
detect the edge transition. If no transition is specified, then the
edge sensitive path works as a simple module path (i.e. at any
transition that occurs on an input terminal).
The polarity operator describes if data passing from the source to
the output is inverted (-)
or not inverted (+).
The keywords posedge and negedge
can be used both in parallel and in full paths.
Examples
Example 1
(posedge clk => (q +: d))
= (3,1);
At a positive edge on a 'clk' signal the value of 'q' will change,
using the rising delay of 3 and the falling delay of 1 time unit. The
data path travels from 'd' to 'q' and data is not inverted.
Important Notes
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