A conditional signal assignment is a special form of signal assignment, similar to the if-then-else statements found in software programming languages, that allows you to describe a sequence of related conditions under which one or more signals are assigned values. The following example (a simple multiplexer) demonstrates the basic form of a conditional assignment:

 

entity my_mux is

    port (Sel: in std_logic_vector (0 to 1);

             A, B, C, D: in std_logic_vector (0 to 3);

             Y: out std_logic_vector (0 to 3));

end my_mux;

 

architecture mux1 of my_mux is

begin

 

    Y <= A when Sel  = "00" else

             B when Sel = "01" else

             C when Sel = "10" else

             D when others;

 

end mux1;

 

A conditional signal assignment consists of an assignment to one output (or a collection of outputs, such as an array of any type) and a series of conditional when statements, as shown. To ensure that all conditions are covered, you can use a terminating when others clause, as was done for the multiplexer description above.

 

Note: It is very important that all conditions in a conditional assignment are covered, as unwanted latches can be easily generated from synthesis for those conditions that are not covered. In the preceding multiplexer example, you might be tempted to replace the clause D when others with D when Sel = "11" (to improve readability). This would not be correct, however, because the data type being used in the design (std_logic_vector) has nine possible values for each bit. This means that there are actually 81 possible unique values that the input Sel could have at any given time, rather than four.

 

The conditional signal assignment also provides a concise method of describing a list of conditions that have some priority. In the case of the multiplexer just described, there is no priority required or specified, since the four conditions (the possible values of the 2-bit input Sel) are all mutually exclusive. In some design descriptions, however, the priority implied by a series of when-else statements can cause some confusion (and additional logic being generated). For this reason, you might want to use a selected signal assignment (described in the next section) as an alternative.

 

See also

image\diamond.gif  Conditional vs. Selected Assignments