The Rapid Prototyping Application-Specific Signal Processors (RASSP) is a major DARPA/Tri-Service-sponsored initiative to reinvent the process by which embedded digital signal processors are developed. The primary goal of RASSP is a four-fold reduction in the time from concept to fielded prototype on both new designs and design upgrades with similar improvements in life cycle cost, quality and supportability. As a prime contractor, Lockheed Martin Advanced Technology Laboratories (LM-ATL), together with over 25 partners from the CAD/CAE industry has worked to accomplish this goal by developing and improving a number of electronic design automation tools coupled with architectural concepts and design methodologies appropriate for embedded signal processor development.
Design benchmarks were used to formally evaluate the RASSP process improvements. This report describes the third of four benchmarks (Benchmark 3) for the RASSP program. The complete hardware/software signal processor upgrade development originally planned for Benchmark 3 was not completed after a decision by the Navy not to use the original signal processor and the project was retarget to embedding a Navy sonar algorithm on Commercial-Off-The-Shelf (COTS) hardware. Nevertheless, several components of the RASSP process were exercised, a 2.3X overall reduction in time-to-market and a 2.9X reduction in development cost compared to traditional developments was demonstrated for the design of the FPCTL SEM-E (E-format standard electronic module) module and related board support package software. On the redirected part of the benchmark, 3.5X reduced real-time application software development time and development cost decreased by 7X was demonstrated through the use of the RASSP auto coding tool suite.
1.0 Executive Summary
2.0 UYS-2A Signal Processor Upgrade
3.0 ETC4ALFS on COTS Summary