Minimum Pin To Pin Delay
[Input Pin delay] + [Routing] + [Logic Element Delay] + [Routing] + [Output Delay]
[Tincomb] + [Tdin2data] + [Tlut + Tcomb] + [Minimum (same col,row)] + [Tiod + Tiocomb + Tod1]
[ 2.8 ] + [4.3] + [1.4 + 0.5] + min(1.4,3.7) + [ 1.3 +0.0 + 2.6]
if ignore routing, then 8.6 ns (this is what marketing will quote).
Note that same column routing much faster than row routing. (hence dedicated carry chains run in column routing).