Lab Assignments
Lab
1 Combinational Logic and The Wonders of 581AH
Lab 2
Multiplexers, Demultiplexers (i.e., Decoders), and Encoders, Some of
the coolest circuit names in all of EE
Lab 3
Adders (not the snakes) and BCD Addition
Lab 4
Flip-Flops and Hazards (Sometimes the circuits with the goofiest names
can do the most amazing things)
Practical Exam I
We will do Lab 6 then Lab 5.
Updated Prelab questions for Lab 5.
Lab 5
IBM parallel port interfacing. Turn a 400MHz Pentium II computer into a
single digit BCD counter!
Updated Prelab questions for Lab 6.
Lab 6
Counters (Flip flops will do our bidding) & Programmable Logic (The
easy way to do things). Experiments on our favorite PALs and GALs.
PAL/PLD data sheet in Adobe Acrobat PDF
data
file for 22v10 (361K bytes)
PAL/PLD Programming Instructions PALASM
Compiler
and Programming Instructions (in text)
Example #1 PAL program Example #1: Counter (in
text)
Example #2 PAL program Example #2: Combination
Logic (in text)
Example #3 PAL program Example #3: Barrel Shift
Register (in text)
Lab 7
Mealy & Moore Synchronous State Machine Design
Lab 8
Data Bus and LCD Module Interfacing
Practical Exam II
Lab 9
Complex Programable Logic Device: 4-Bit ALU
The following are useful CPLD's links:
Book for Able programming language
reference
Vantis DesignDirect
Tutorial including schematic entry and ABEL design input.
Example of ABEL syntax. All five abl files implement the same
design with different methods with simulation. You should study them
for Lab 9 and Project.
BCD combinational logic equation entry ABEL BCD Counter #0
BCD state machine table entry
ABEL BCD Counter #1
BCD table design using sets
ABEL BCD Counter #2
BCD state machine design using tests and math ABEL BCD Counter #3
BCD schematic entry ABEL BCD
Counter #4
Device datasheets
Data sheet for Vantis
MACH111(SP),MACH211(SP) SP-are in circuit programming
Data sheet for Vantis MACH4
family
Data sheet for Lattice:
MACH4 family introduction
Data sheet for Lattice:
MACH4 family architecture
Data sheet for Lattice: MACH4
family datasheet
Additional resources
for PALs and CPLDs
Project
Design and Play BlackJack card game.
Addition to the CPLD's you we have the following PLDs / PALs that are
available:
Data sheet for PALCE26v12
Data sheet for PALCE29MA16
Data sheet for PALCE29MA16
internal nodes
Data sheet for PALCE610
NEW ---> Information for
DesignDirect license file
Additional State Machine Examples:
BCD counts in 7-seg. directly.
Special BCD counter state machine design.
0-59 BCD counter Special design
method for large state machines.
EE481
Mike Lhamon
Nov. 24, 2003