Using Loops and Multiple Processes

Test benches can be dramatically simplified through the use of loops, constants and other more advanced features of VHDL. Using multiple concurrent processes in combination with loops can result in very concise descriptions of complex input and expected output conditions.

The following example demonstrates how a loop (in this case a while loop) might be used to create a background clock in one process, while other loops (in this case for loops) are used to apply inputs and monitor outputs over potentially long periods of time:

    Clock1: process

        variable clktmp: std_logic := '1';

    begin    

        while done /= true loop

            wait for PERIOD/2;

            clktmp := not clktmp;

            Clk <= clktmp;

        end loop;

        wait;

    end process;

    Stimulus1: Process

    Begin

        Reset <= '1';

        wait for PERIOD;

        Reset <= '0';

        Mode <= '0';

        wait for PERIOD;

        Data <= (others => '1');

        wait for PERIOD;

        Mode <= '1';

        -- Check to make sure we detect the vertical sync...

        Data <= (others => '0');

        for i in 0 to 127 loop

            wait for PERIOD;

            assert (VS = '1')

                report "VS went high at the wrong place!" severity ERROR;

        end loop;

        assert (VS = '1')

             report "VS was not detected!" severity ERROR;

        -- Load in the test counter value to check the end of frame detection...

        TestLoad <= '1';

        wait for PERIOD;

        TestLoad <= '0';

        for i in 0 to 300 loop

            Data <= RandomData();

            wait for PERIOD;

        end loop;

        assert (EOF = '1')

             report "EOF was not detected!" severity ERROR;

        done <= true;

        wait;

    End Process;

End stimulus;

In this example, the process labeled Clock1 uses a local variable (clktmp) to describe a repeating clock with a period defined by the constant PERIOD. This clock is described with a while loop statement, and it runs independent of all other processes in the test bench until the done signal is asserted true. The second process, Stimulus1, describes a sequence of inputs to be applied to the unit under test. It also makes use of loops—in this case for loops—to describe lengthy repeating stimuli and expected value checks.