Chip To Chip

Output

Routing

Clkpin

DFF

Q

IOE

Tdclk2ioe

Tioc + Tioco + Tod1

Dedicated Clock pin

Chip 1

Q

IOE

Input

Tsu_ext

Tinreg + Tiosu

D

Chip 2

(clk2out + Tsu_ext) will be constraint on how fast data is exchanged between chips

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