Logic Functions > Old-Style Macrofunctions > Counters
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74163 (Counter)4-Bit Binary Up Counter with Synchronous Load and Synchronous Clear
Default Signal Levels:
AHDL Function Prototype (port name and order also apply to Verilog HDL):
FUNCTION 74163 (clk, ldn, clrn, enp, ent, d, c, b, a)
RETURNS (qd, qc, qb, qa, rco);
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Inputs |
Outputs |
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CLK |
LDN |
CLRN |
ENP |
ENT |
D |
C |
B |
A |
QD |
QC |
QB |
QA |
RCO |
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QD |
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QB |
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* RCO = QD & QC & QB & QA & ENT
See also:
