Indian Institute of Technology, Bombay, Department of Electrical Engineering, VLSI Lab에서 작성한 Xilinx ISE tool을 이용한 Tutorial입니다.

목차

1. Introduction to Xilinx
• Purpose of Xilinx Tool
• Xilinx Flow Overview
• Available Xilinx Product Families
• Selection Consideration for Xilinx Device
2. Creating new ISE Project
3. Synthesizing the Design
• Understanding Synthesis Process Properties
• Analyzing Synthesis Report
• Generating Post-Synthesis Simulation Model
4. Specifying User Constraints
• Understanding Timing Constraints
• Assigning Package Pins
5. Translating the Design
6. Mapping the Design
• Understanding MAP Options
• Analyzing MAP Report
7. Placing and Routing the Design
• Understanding PAR options
• Analyzing PAR Report
• Asynchronous Delay Report
• Post PAR Static Timing Analysis
• Generating Post PAR Simulation Model
8. Generating BitMap File

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