What are Virtex and Spartan-II I/O Pins Doing?
By Austin Lesea and Peter Alfke:
Principal Engineer, Xilinx San Jose
Director, Applications Engineering, Xilinx San Jose
- Publication Data: 01/10/2003 -
Introduction
We receive many questions about I/O behavior under special circumstances, such as before and during configuration, after configuration if one Vcc is removed, or if the pin is pulled lower than ground or higher than Vcco.
The cases of interest are:
- Powering up
- Before and during configuration
- Normal operation after configuration has been completed.
- Losing Vcco
The answer to these questions is made more complicated by the subtle differences between the following Virtex¢â and Spartan-II¢â sub-families:
- Virtex¢â and Spartan-II¢â
- Virtex-E¢â and Spartan-IIE¢â (with small differences for Virtex-E between 8-inch and 12-inch foundries)
- Virtex-II¢â and Virtex-II¢âES
- Virtex-II Pro¢â and Virtex-II Pro¢âES
In the very beginning...
(V, V-E, S-II, and S-IIE devices)
While power is first applied, all I/Os are put into a 3-state condition for any sequence of Vccint, and Vcco. There are no power-sequencing requirements.
There is a special case only for Virtex-E devices that are marked with 0707 after the speed/temperature designation: On these Virtex-E devices the supply voltages should be sequenced such that Vccint comes up first. Vccint must have reached 90% of nominal before Vcco reaches 10% of nominal, or else the I/O pins may drive High, Low, or even both simultaneously (!). This unpredictable behavior cannot harm the device short-term, and it always ends as soon as Vccint has reached about 0.8 V.
If this behavior is unacceptable, append 0773 to the order code. (Note that XCV1600-E and XCV2600-E as well as XCV405-EM and XCV812-EM always come with the voltage sequencing requirement.)
Vcc has been applied, before and during configuration
(V, V-E, S-II, and S-IIE devices)
While the device is being configured, all I/Os are placed into a 3-state condition. Negative inputs are always diode-clamped to ground.
The diode to Vcc depends upon the I/O configuration option. Before and during configuration, all these diodes are therefore disabled. Before and during configuration, pin voltages above Vcco are not clamped to Vcco. After configuration is completed, the clamping depends on the standard (see below).
Devices are configured and operating normally
(V, V-E, S-II, and S-IIE devices)
After the device is configured, the outputs are whatever they have been configured to be. If they are active, they will be pulling all the way to Vcco, or pulling to ground (except GTL, which pulls to ground only, or LVDS, which is a current sink or source). Every I/O is always available as an input, but in order to receive an external signal as input, the output must be put into a 3-state condition.
All families have always a diode from pin to ground, clamping any negative input current to -0.5 V or slightly more negative. Note that an active Low output also helps to short negative input current to ground. If the input voltage is more positive than the Vcco voltage, it will be clamped by a forward-biased diode to Vcco for most I/O standards:
The clamp diode is disabled in the following Virtex and Spartan-II I/O standards:
The clamp diode is permanently disabled in the following Virtex-E and Spartan-IIE I/O standards:
- GTL and GTL+
- LVCMOS18 and LVCMOS2
- LVDS and LVPECL
After everything was powered on, Vcc is lost
(V, V-E, S-II, and S-IIE devices)
Once power is lost on either the Vcco pin or the Vccint pin, all I/Os are placed into a 3-state condition, and all clamp diodes are disabled.
In the very beginning...
(All V-II device types
For Virtex-II ES, all power supplies must come on within their rise times; if this does not happen, the I/O pins may drive High, Low, or anywhere in between (not 3-state), until Vccint has reached the power-on-reset level of >1V.
For Virtex-II production material, any power-on sequence will keep all I/O pins in a 3-state condition.
For Virtex-II Pro ES, and Virtex-II Pro production material, any power-on sequence will keep all I/O pins in a 3-state condition.
Vcc has been applied, before and during configuration
(All VII device types)
While the device is being configured, all I/Os are put into a 3-state condition. Negative inputs are always diode-clamped to ground. The diode to Vcco is always present and cannot be disabled. Thus even while configuring, these families will clamp positive input current to one diode drop above Vcco.
Devices are configured and operating normally
(All VII device types)
After the device is configured, the outputs are whatever they have been configured to be. If they are active, they will be pulling all the way to Vcco, or pulling to ground (except GTL which pulls to ground only, or LVDS which is a current sink or source). Every I/O is always available as an input, but in order to receive an external signal as input, the output must be put into a 3-state condition. All families always include a diode from pin to ground, clamping any negative input current to -0.5 V or slightly more negative.
Note that an active Low output also helps to short negative input current to ground. If the input voltage is more positive than the Vcco voltage, it will be clamped by a forward-biased diode to Vcco.
After everything was powered on, Vcc is lost
(All VII device types)
Once power is lost on either the Vcco pin, the Vccint pin, or the Vccaux pin, all I/Os are placed into a 3-state condition Since all clamp diodes to Vcco are always present, the I/O can "reverse-power" the Vcco to one diode drop below the highest I/O pin voltage. One I/O bank draws only about 2 mA total in this state and might thus appear powered if one or some of its I/O pins is being driven High. This causes no damage. Vccint can never be reverse-powered.
Summary
I/Os generally behave in a predictable and desirable way, even during power-up, during configuration, and when pulled below ground or above Vcc. However, users must be aware of the presence or absence of clamping diodes between the I/O pin and Vcco.
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