set_operating_conditions -library "lsi_10k" "WCCOM"
set_wire_load "10x10" -library "lsi_10k"
set_driving_cell -cell AN2P -library lsi_10k all_inputs()
set_load 1 all_outputs()
compile -map_effort low -incremental_mapping
change_names -rules vhdl
vhdlout_use_packages = {"IEEE.std_logic_1164", "IEEE.std_logic_arith.all", "IEEE.std_logic_textio.all", "lsi_10k.COMPONENTS.all"}
vhdlout_architecture_name = "SYN"
vhdlout_top_configuration_arch_name = "SYN"
vhdlout_write_top_configuration = "TRUE"
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