There are many different applications of the IEEE 1076.3 numeric data types, operators and functions. The following example demonstrates how the type unsigned might be used to simplify the description of a counter:

 

-------------------------------------------------------

-- COUNT16: 4-bit counter.

--

library ieee;

use ieee.std_logic_1164.all;

use ieee.numeric_std.all;

 

entity COUNT16 is

    port (Clk,Rst,Load: in std_logic;

          Data: in std_logic_vector (3 downto 0);

          Count: out std_logic_vector (3 downto 0)

    );

end COUNT16;

 

architecture COUNT16_A of COUNT16 is

    signal Q: unsigned (3 downto 0);

    constant MAXCOUNT: unsigned (3 downto 0) := "1111";

begin

    process(Rst,Clk)

    begin

        if Rst = '1' then

            Q <= (others => ‘0’);

        elsif rising_edge(Clk) then

            if Load = '1' then

                Q <= UNSIGNED(Data);     -- Type conversion

            elsif Q = MAXCOUNT then

                Q <= (others => ‘0’);

            else

                Q <= Q + 1;

            end if;

        end if;

 

        Count <= STD_LOGIC_VECTOR(Q);  -- Type conversion

 

    end process;

 

end COUNT16_A;

 

In this example, the type unsigned is used within the architecture to represent the counter data. The add operation (‘+’) is defined for type unsigned by the 1076-3 standard (in library numeric_std) so the counter can be easily described. Because the unsigned and std_logic_vector data types share the same element type (std_logic), conversion between these types is straightforward, as shown.