PPT Slide

architecture a of control is

-- FFs for Finite State Machine

signal q, d : std_logic_vector(5 downto 0);

begin

-- State Flip Flops

stateff: process (clk,reset)

begin

if (reset = '1') then

q <= "000001";

elsif (clk'event and clk='1') then

q <= d;

end if;

end process stateff;

-- FF equations

d(0) <= q(0) and (not rb);

d(1) <= (q(0) and rb) or (q(1) and (not ra));

d(2) <= q(2) or (q(1) and ra and (d7_i or d11_i)) or (q(5) and ra and eq);

d(3) <= q(3) or (q(1) and ra and (not d7_i) and (not d11_i) and D2312_i)

or (q(5) and ra and (not eq) and (d7_i)) ;

d(4) <= (q(1) and ra and (not d7_i) and (not d11_i) and (not D2312_i))

or (q(4) and (not rb))

or (q(5) and ra and (not eq) and (not d7_i));

d(5) <= (q(4) and rb) or (q(5) and not ra);

win <= q(2);

lose <= q(3);

q0 <= q(0);

q1 <= q(1);

q4 <= q(4);

q5 <= q(5);

sp <= q(1) and ra and (not d7_i) and (not d11_i) and (not d2312_i);

roll <= (q(1) and (not ra)) or (q(5) and (not ra));

end a;