VHDL and Hardware/Software Codesign

 
Content: introduction, application domains, degree of programmability, co-design of embedded systems, Chinook environment, research activities

Introduction

The recent rise in hardware/software codesign is due to the introduction of hardware design languages such as VHDL and computer-aided design tools including commercial simulators and hardware synthesizers. The evolution of integrated circuit technology leads to higher levels of integration including programmable devices. Complex macrocells implementing instruction-set processors (ISPs) are now available as processor cores often written in VHDL. The use of cores of specific processors means leveraging available software layers, ranging from operating systems to embedded software for user-oriented applications.
Design of embedded systems is a complex discipline. It can be subject to many different types of constraints, including timing, size, weight, power consumption, reliability, and cost.
The codesign processes depend on several criteria such as domain of application, degree of programmability and implementation features.

Application domains


 
 

Hardware/software codesign is especially well adapted for the the design of embedded controllers for reactive real-time applications . These controllers utilize Micro-processors, Micro-controllers and Digital Signal Processors but are neither used nor perceived as computers. Generally, software is used for features and flexibility, while hardware is used for performance. Some examples of applications of embedded controllers are:

Degree of programmability

Most of complex digital systems contains some software programs to perform the desired functions. However, when considering embedded systems, the end-user has limited access to programming. The most software is already provided by the system integrator, the user can program/select only the application functions (application level programming).
System integrator uses mainly  instruction level programming with an instruction set architecture (ISA). the instruction set defines the boundary between hardware and software, by providing a programming model of hardware.
Examples of instruction level programmable components are: microprocessors, microcontrollers , and digital signal microprocessors.
In embedded systems, the ISA is not visible to the user because it runs embedded software. The lowest programming level , the hardware programming means configuring hardware after the manufacturing process. Microprogramming and FPGA configuration are considered as  hardware programming.
Both instruction level programmable devices and hardware level programmable devices may be provided as VHDL models.
 

Codesign of embedded systems
Depending on the application domain some embedded systems provide control functions while others perform information processing.  Single-chip implementations of an embedded controller may integrate on the same chip input/output interfaces/converters, timers, memory with the embedded software and data processing units. Real-time controllers must often satisfy soft and hard timing constraints. Embedded systems for telecommunication applications involve data processing such as data compression/decompression, coding and conversion.

The design of embedded systems include modeling, validation, and implementation. Modeling is a process of conceptualization and refinement of  specifications, it produces corresponding hardware and software models. the software model may be expressed in C language while the hardware models are usually described in a hardware description language such as VHDL.
These tasks are quite complex because the system functions may be performed by different and heterogeneous components, and the design  requirements and implementation constraints may involve a specific hardware/software partitioning.

Hardware/software partitioning
A hardware/software partitioning process represents a physical partition of overall system functionality into application-specific hardware and software executing on one (or more) processor(s). This process may involve different objectives including high performance and low-capacity (low cost) formulated as performance and/or capacity constraints.
Different partitioning  strategies depend on the modeling paradigms used to capture the system functionnalities. All of them provide task partitioning, scheduling, and resource binding. In principle all of these processes may be carried concurrently; practically there are often serialized.

For example in Chinook environment (presented below),  provided for designing reactive real-time systems, the overall system can have different modes of operation, each having a schedule. Timing watchdogs can disable modes and cause mode transitions. Upon changing of mode, the system starts running the corresponding schedule. Timing constraints may be modal or intra-modal. Each mode has a periodic set of tasks, which is unrolled and scheduled under timing constraints, using an extension of the relative scheduling formulation. With this scheduling method, Chinook supports the mapping of an embedded system model to one or more processors and peripherals while ensuring the satisfaction of timing constraints.


The Chinook environment

Chinook is a hardware-software co-design tool for heterogeneous distributed embedded systems. It supports component-based design of control dominated, reactive systems under timing constraints.

Current research topics

The co-simulator -- Pia , is written in Java, and will soon have an applet remote interface.

Design methodology

Chinook helps designers by supporting specification composition and synthesis. Composition facilitates specification, while synthesis takes care of implementation.

To manage complexity, the designer must raise the level of abstraction by reasoning at a higher level. It should be possible to derive a system-level specification using high-level components, instead of re-specifying everything from scratch. Once the behavioral description is derived, we envision that the designer makes the partitioning and allocation decisions, and uses Chinook to map it onto several target architecture interactively. This enables designers to make informed design decisions at the high level early in the design cycle, rather than reiterate after having worked out all the low level details.
 


Research Activities related to Hardware/Software CODESIGN