-- -----------------------------------------------------------------------------
--  TXD2IRDA - a RS232 TxD signal to IrDA 1.0 signal generator                -- 
-- -----------------------------------------------------------------------------
--
--  File        : 'txd2irda.vhd'
--  Author      :  Lars Larsson 
-- 
--  Date        :  February 15, 1999
--
--  Description :  This converts a RS232 TxD signal into an IrDA 1.0 TxD signal
--                 with 3/16 duty cycle. The baud rate is adjusted by the bit 
--                 time parameter T.
--
-- -----------------------------------------------------------------------------
--
-- Copyright (C) 1999 Lars Larsson, Dept. of Computer Science
--                                  University of Hamburg
--                                  Vogt-Koelln-Str. 30
--                                  D - 22041 Hamburg, Germany
--                                  larsson@informatik.uni-hamburg.de
--                                  http://tech-www.informatik.uni-hamburg.de/~larsson
--
-- This program is free software; you can redistribute it and/or modify it
-- under the terms of the GNU General Public License as published by the
-- Free Software Foundation; either version 2 of the License, or (at your
-- option) any later version.
--
-- This program is distributed in the hope that it will be useful, but
-- WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
-- or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
-- for more details.
--
-- You should have received a copy of the GNU General Public License along
-- with this program; if not, write to the Free Software Foundation, Inc.,
-- 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
--
-- -----------------------------------------------------------------------------

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;

entity txd2irda is
  port(         
                  t :  in time;             -- T_BAUD = 1/(baud rate)
          rs232_txd :  in std_ulogic;       -- RS232 TxD signal input 
           irda_txd : out std_ulogic        -- IrDA 1.0 TXD output (high active)
       );
end txd2irda;

architecture simulate of txd2irda is

   signal irda_s : std_ulogic;

   begin

       irda_p : process
                begin
                   wait on rs232_txd for 1 ns; wait for  7*t/16;
                   irda_s <= '1';              wait for  3*t/16; 
                   irda_s <= '0';              wait for  6*t/16;
                end process;

	   irda_txd <= irda_s and (not rs232_txd);

   end simulate;

-- -----------------------------------------------------------------------------

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