-- 
-- Program 
-- C:\CAO\EXEMPLAR\BIN\PC\FPGA.EXE C:\TEMP\ORIGINAL\COUNT4.VHD C:\TEMP\RTL\COUN
-- T4.RTL -COMMAND_FILE=C:\CAO\EXEMPLAR\BIN\PC\TMP18.$$$ 
-- Version V2.1.7
-- Definition of  COUNT4
-- 
-- VHDL Concurrent Statements, created by
-- Exemplar Logic's CORE
--      Fri Nov 17 12:44:02 1995
-- 
-- 
-- 

library exemplar ;
use exemplar.exemplar_1164.all ;
library ieee ;
use ieee.std_logic_1164.all ;

entity COUNT4 is
   port (
      CLOCK, PRESET, CLEAR, PRELOAD, COUNT_IN_3, COUNT_IN_2, COUNT_IN_1, 
      COUNT_IN_0 : in std_logic ;
      COUNT_OUT_3, COUNT_OUT_2, COUNT_OUT_1, COUNT_OUT_0 : inout std_logic
   ) ;
end COUNT4 ;

architecture exemplar of COUNT4 is
   signal
      vh_4, vh_5, vh_6, vh_7, vh_8, vh_9, vh_10, vh_11, vh_12, vh_13, vh_14, 
      vh_15, vh_16, vh_17, vh_18, vh_19, vh_20, vh_21, vh_22, vh_23, vh_24, 
      vh_25, vh_26, vh_27, vh_28, vh_29, vh_30, vh_31, vh_32, vh_33, vh_34, 
      vh_35, vh_36, vh_37, vh_38, vh_39, vh_40, vh_41, vh_42, vh_43, vh_44, 
      vh_45, vh_46, vh_47, vh_48, vh_49, vh_50, vh_51, vh_52, vh_53, vh_54, 
      vh_55, vh_56, vh_57, vh_58, vh_59, vh_60, vh_61, vh_62, vh_63, vh_64, 
      vh_65, vh_66, vh_67, vh_68, vh_69, vh_70, vh_71, vh_72, vh_73, vh_74, 
      vh_75, vh_76, vh_77, vh_78, vh_79, vh_80, vh_81, vh_82, vh_83, vh_84, 
      vh_85, vh_91, vh_92, vh_98, vh_99, vh_105, vh_106: std_logic ;
 
begin
   vh_4 <= (CLEAR and  not PRESET) ;
   vh_5 <= ( not CLEAR and  not PRESET) ;
   vh_6 <= (PRELOAD and vh_5) ;
   vh_7 <= ( not COUNT_OUT_3 and  not COUNT_OUT_2 and  not COUNT_OUT_1 and 
       not COUNT_OUT_0) ;
   vh_8 <= ( not COUNT_OUT_3 and  not COUNT_OUT_2 and  not COUNT_OUT_1 and 
      COUNT_OUT_0) ;
   vh_9 <= ( not COUNT_OUT_3 and  not COUNT_OUT_2 and COUNT_OUT_1 and  not 
      COUNT_OUT_0) ;
   vh_10 <= ( not COUNT_OUT_3 and  not COUNT_OUT_2 and COUNT_OUT_1 and 
      COUNT_OUT_0) ;
   vh_11 <= ( not COUNT_OUT_3 and COUNT_OUT_2 and  not COUNT_OUT_1 and  not 
      COUNT_OUT_0) ;
   vh_12 <= ( not COUNT_OUT_3 and COUNT_OUT_2 and  not COUNT_OUT_1 and 
      COUNT_OUT_0) ;
   vh_13 <= ( not COUNT_OUT_3 and COUNT_OUT_2 and COUNT_OUT_1 and  not 
      COUNT_OUT_0) ;
   vh_14 <= ( not COUNT_OUT_3 and COUNT_OUT_2 and COUNT_OUT_1 and 
      COUNT_OUT_0) ;
   vh_15 <= (COUNT_OUT_3 and  not COUNT_OUT_2 and  not COUNT_OUT_1 and  not 
      COUNT_OUT_0) ;
   vh_16 <= (COUNT_OUT_3 and  not COUNT_OUT_2 and  not COUNT_OUT_1 and 
      COUNT_OUT_0) ;
   vh_17 <= (COUNT_OUT_3 and  not COUNT_OUT_2 and COUNT_OUT_1 and  not 
      COUNT_OUT_0) ;
   vh_18 <= (COUNT_OUT_3 and  not COUNT_OUT_2 and COUNT_OUT_1 and 
      COUNT_OUT_0) ;
   vh_19 <= (COUNT_OUT_3 and COUNT_OUT_2 and  not COUNT_OUT_1 and  not 
      COUNT_OUT_0) ;
   vh_20 <= (COUNT_OUT_3 and COUNT_OUT_2 and  not COUNT_OUT_1 and 
      COUNT_OUT_0) ;
   vh_21 <= (COUNT_OUT_3 and COUNT_OUT_2 and COUNT_OUT_1 and  not 
      COUNT_OUT_0) ;
   vh_22 <= (COUNT_OUT_3 and COUNT_OUT_2 and COUNT_OUT_1 and COUNT_OUT_0) ;
   vh_23 <= (vh_22) or (vh_21) ;
   vh_24 <= (vh_21) or (vh_20) ;
   vh_25 <= (vh_21) or (vh_20) ;
   vh_26 <= (vh_23) or (vh_20) ;
   vh_27 <= (vh_22) or (vh_19) ;
   vh_28 <= (vh_25) or (vh_19) ;
   vh_29 <= (vh_26) or (vh_19) ;
   vh_30 <= (vh_21) or (vh_18) ;
   vh_31 <= (vh_29) or (vh_18) ;
   vh_32 <= (vh_28) or (vh_17) ;
   vh_33 <= (vh_31) or (vh_17) ;
   vh_34 <= (vh_27) or (vh_16) ;
   vh_35 <= (vh_30) or (vh_16) ;
   vh_36 <= (vh_24) or (vh_16) ;
   vh_37 <= (vh_32) or (vh_16) ;
   vh_38 <= (vh_33) or (vh_16) ;
   vh_39 <= (vh_34) or (vh_15) ;
   vh_40 <= (vh_35) or (vh_15) ;
   vh_41 <= (vh_38) or (vh_15) ;
   vh_42 <= (vh_41) or (vh_14) ;
   vh_43 <= (vh_39) or (vh_13) ;
   vh_44 <= (vh_40) or (vh_13) ;
   vh_45 <= (vh_37) or (vh_13) ;
   vh_46 <= (vh_42) or (vh_13) ;
   vh_47 <= (vh_44) or (vh_12) ;
   vh_48 <= (vh_45) or (vh_12) ;
   vh_49 <= (vh_46) or (vh_12) ;
   vh_50 <= (vh_36) or (vh_11) ;
   vh_51 <= (vh_49) or (vh_11) ;
   vh_52 <= (vh_43) or (vh_10) ;
   vh_53 <= (vh_47) or (vh_10) ;
   vh_54 <= (vh_50) or (vh_10) ;
   vh_55 <= (vh_51) or (vh_10) ;
   vh_56 <= (vh_52) or (vh_9) ;
   vh_57 <= (vh_54) or (vh_9) ;
   vh_58 <= (vh_48) or (vh_9) ;
   vh_59 <= (vh_55) or (vh_9) ;
   vh_60 <= (vh_56) or (vh_8) ;
   vh_61 <= (vh_57) or (vh_8) ;
   vh_62 <= (vh_59) or (vh_8) ;
   vh_63 <= (vh_53) or (vh_7) ;
   vh_64 <= (vh_61) or (vh_7) ;
   vh_65 <= (vh_62) or (vh_7) ;
   vh_66 <= (COUNT_IN_3 and vh_6) ;
   vh_67 <= (COUNT_IN_2 and vh_6) ;
   vh_68 <= (COUNT_IN_1 and vh_6) ;
   vh_69 <= (COUNT_IN_0 and vh_6) ;
   vh_70 <= (vh_6) or (vh_4) ;
   vh_71 <= (vh_66) or (PRESET) ;
   vh_72 <= (vh_67) or (PRESET) ;
   vh_73 <= (vh_68) or (PRESET) ;
   vh_74 <= (vh_69) or (PRESET) ;
   vh_75 <= (vh_70) or (PRESET) ;
   vh_76 <= (COUNT_OUT_3 and  not vh_65) ;
   vh_77 <= (vh_76) or (vh_60) ;
   vh_78 <= (COUNT_OUT_2 and  not vh_65) ;
   vh_79 <= (vh_78) or (vh_63) ;
   vh_80 <= (COUNT_OUT_1 and  not vh_65) ;
   vh_81 <= (vh_80) or (vh_64) ;
   vh_82 <= (COUNT_OUT_0 and  not vh_65) ;
   vh_83 <= (vh_82) or (vh_58) ;
   vh_84 <= (vh_71 and vh_75) ;
   vh_85 <= ( not vh_71 and vh_75) ;
   vh_91 <= (vh_72 and vh_75) ;
   vh_92 <= ( not vh_72 and vh_75) ;
   vh_98 <= (vh_73 and vh_75) ;
   vh_99 <= ( not vh_73 and vh_75) ;
   vh_105 <= (vh_74 and vh_75) ;
   vh_106 <= ( not vh_74 and vh_75) ;
   DFFPC( vh_77, vh_84, vh_85, CLOCK, COUNT_OUT_3) ;
   DFFPC( vh_79, vh_91, vh_92, CLOCK, COUNT_OUT_2) ;
   DFFPC( vh_81, vh_98, vh_99, CLOCK, COUNT_OUT_1) ;
   DFFPC( vh_83, vh_105, vh_106, CLOCK, COUNT_OUT_0) ;

end exemplar ;