-- 
-- Program 
-- C:\CAO\EXEMPLAR\BIN\PC\FPGA.EXE C:\TEMP\ORIGINAL\COUNT3.VHD C:\TEMP\RTL\COUN
-- T3.RTL -COMMAND_FILE=C:\CAO\EXEMPLAR\BIN\PC\TMP17.$$$ 
-- Version V2.1.7
-- Definition of  COUNT3
-- 
-- VHDL Concurrent Statements, created by
-- Exemplar Logic's CORE
--      Fri Nov 17 12:43:37 1995
-- 
-- 
-- 

library exemplar ;
use exemplar.exemplar_1164.all ;
library ieee ;
use ieee.std_logic_1164.all ;

entity COUNT3 is
   port (
      CLOCK, RESET, ENABLE, UPDOWN : in std_logic ;
      COUNT_OUT_7, COUNT_OUT_6, COUNT_OUT_5, COUNT_OUT_4, COUNT_OUT_3, 
      COUNT_OUT_2, COUNT_OUT_1, COUNT_OUT_0 : inout std_logic) ;
end COUNT3 ;

architecture exemplar of COUNT3 is
   signal
      vh_8, vh_9, vh_10, vh_11, vh_12, vh_13, vh_14, vh_15, vh_16, vh_17, 
      vh_18, vh_19, vh_20, vh_21, vh_22, vh_23, vh_24, vh_25, vh_26, vh_27, 
      vh_28, vh_29, vh_30, vh_31, vh_32, vh_33, vh_34, vh_35, vh_36, vh_37, 
      vh_38, vh_39, vh_40, vh_41, vh_42, vh_43, vh_44, vh_45, vh_46, vh_47, 
      vh_48, vh_49, vh_50, vh_51, vh_52, vh_53, vh_54, vh_55, vh_56, vh_57, 
      vh_58, vh_59, vh_60, vh_61, vh_62, vh_63, vh_64, vh_65, vh_66, vh_67, 
      vh_68, vh_93, vh_94, vh_95, vh_96, vh_97, vh_98, vh_99, vh_100, vh_101, 
      vh_102, vh_103, vh_104, vh_105, vh_106, vh_107, vh_108, vh_109, vh_110
      : std_logic ;
 
begin
   vh_8 <= (UPDOWN and ENABLE) ;
   vh_9 <= ( not RESET and vh_8) ;
   vh_10 <= ( not RESET and  not vh_8) ;
   vh_11 <= (COUNT_OUT_7 and  not vh_98) or ( not COUNT_OUT_7 and vh_98) ;
   vh_12 <= (COUNT_OUT_6 and  not vh_97) or ( not COUNT_OUT_6 and vh_97) ;
   vh_13 <= (COUNT_OUT_5 and  not vh_96) or ( not COUNT_OUT_5 and vh_96) ;
   vh_14 <= (COUNT_OUT_4 and  not vh_95) or ( not COUNT_OUT_4 and vh_95) ;
   vh_15 <= (COUNT_OUT_3 and  not vh_94) or ( not COUNT_OUT_3 and vh_94) ;
   vh_16 <= (COUNT_OUT_2 and  not vh_93) or ( not COUNT_OUT_2 and vh_93) ;
   vh_17 <= (COUNT_OUT_1 and  not COUNT_OUT_0) or ( not COUNT_OUT_1 and 
      COUNT_OUT_0) ;
   vh_18 <= ( not UPDOWN and ENABLE) ;
   vh_19 <= (vh_18 and vh_10) ;
   vh_20 <= ( not COUNT_OUT_7 and  not vh_110) or (COUNT_OUT_7 and vh_110) ;
   vh_21 <= ( not COUNT_OUT_6 and  not vh_108) or (COUNT_OUT_6 and vh_108) ;
   vh_22 <= ( not COUNT_OUT_5 and  not vh_106) or (COUNT_OUT_5 and vh_106) ;
   vh_23 <= ( not COUNT_OUT_4 and  not vh_104) or (COUNT_OUT_4 and vh_104) ;
   vh_24 <= ( not COUNT_OUT_3 and  not vh_102) or (COUNT_OUT_3 and vh_102) ;
   vh_25 <= ( not COUNT_OUT_2 and  not vh_100) or (COUNT_OUT_2 and vh_100) ;
   vh_26 <= ( not COUNT_OUT_1 and  not COUNT_OUT_0) or (COUNT_OUT_1 and 
      COUNT_OUT_0) ;
   vh_27 <= (vh_20 and vh_19) ;
   vh_28 <= (vh_21 and vh_19) ;
   vh_29 <= (vh_22 and vh_19) ;
   vh_30 <= (vh_23 and vh_19) ;
   vh_31 <= (vh_24 and vh_19) ;
   vh_32 <= (vh_25 and vh_19) ;
   vh_33 <= (vh_26 and vh_19) ;
   vh_34 <= ( not COUNT_OUT_0 and vh_19) ;
   vh_35 <= (vh_11 and vh_9) ;
   vh_36 <= (vh_35) or (vh_27) ;
   vh_37 <= (vh_12 and vh_9) ;
   vh_38 <= (vh_37) or (vh_28) ;
   vh_39 <= (vh_13 and vh_9) ;
   vh_40 <= (vh_39) or (vh_29) ;
   vh_41 <= (vh_14 and vh_9) ;
   vh_42 <= (vh_41) or (vh_30) ;
   vh_43 <= (vh_15 and vh_9) ;
   vh_44 <= (vh_43) or (vh_31) ;
   vh_45 <= (vh_16 and vh_9) ;
   vh_46 <= (vh_45) or (vh_32) ;
   vh_47 <= (vh_17 and vh_9) ;
   vh_48 <= (vh_47) or (vh_33) ;
   vh_49 <= ( not COUNT_OUT_0 and vh_9) ;
   vh_50 <= (vh_49) or (vh_34) ;
   vh_51 <= (vh_19) or (vh_9) ;
   vh_52 <= (vh_51) or (RESET) ;
   vh_53 <= (COUNT_OUT_7 and  not vh_52) ;
   vh_54 <= (vh_53) or (vh_36) ;
   vh_55 <= (COUNT_OUT_6 and  not vh_52) ;
   vh_56 <= (vh_55) or (vh_38) ;
   vh_57 <= (COUNT_OUT_5 and  not vh_52) ;
   vh_58 <= (vh_57) or (vh_40) ;
   vh_59 <= (COUNT_OUT_4 and  not vh_52) ;
   vh_60 <= (vh_59) or (vh_42) ;
   vh_61 <= (COUNT_OUT_3 and  not vh_52) ;
   vh_62 <= (vh_61) or (vh_44) ;
   vh_63 <= (COUNT_OUT_2 and  not vh_52) ;
   vh_64 <= (vh_63) or (vh_46) ;
   vh_65 <= (COUNT_OUT_1 and  not vh_52) ;
   vh_66 <= (vh_65) or (vh_48) ;
   vh_67 <= (COUNT_OUT_0 and  not vh_52) ;
   vh_68 <= (vh_67) or (vh_50) ;
   vh_93 <= (COUNT_OUT_1 and COUNT_OUT_0) ;
   vh_94 <= (COUNT_OUT_2 and vh_93) ;
   vh_95 <= (COUNT_OUT_3 and vh_94) ;
   vh_96 <= (COUNT_OUT_4 and vh_95) ;
   vh_97 <= (COUNT_OUT_5 and vh_96) ;
   vh_98 <= (COUNT_OUT_6 and vh_97) ;
   vh_99 <= (COUNT_OUT_1 and COUNT_OUT_0) ;
   vh_100 <= (vh_99) or (COUNT_OUT_0) or (COUNT_OUT_1) ;
   vh_101 <= (COUNT_OUT_2 and vh_100) ;
   vh_102 <= (vh_101) or (vh_100) or (COUNT_OUT_2) ;
   vh_103 <= (COUNT_OUT_3 and vh_102) ;
   vh_104 <= (vh_103) or (vh_102) or (COUNT_OUT_3) ;
   vh_105 <= (COUNT_OUT_4 and vh_104) ;
   vh_106 <= (vh_105) or (vh_104) or (COUNT_OUT_4) ;
   vh_107 <= (COUNT_OUT_5 and vh_106) ;
   vh_108 <= (vh_107) or (vh_106) or (COUNT_OUT_5) ;
   vh_109 <= (COUNT_OUT_6 and vh_108) ;
   vh_110 <= (vh_109) or (vh_108) or (COUNT_OUT_6) ;
   DFF( vh_54, CLOCK, COUNT_OUT_7) ;
   DFF( vh_56, CLOCK, COUNT_OUT_6) ;
   DFF( vh_58, CLOCK, COUNT_OUT_5) ;
   DFF( vh_60, CLOCK, COUNT_OUT_4) ;
   DFF( vh_62, CLOCK, COUNT_OUT_3) ;
   DFF( vh_64, CLOCK, COUNT_OUT_2) ;
   DFF( vh_66, CLOCK, COUNT_OUT_1) ;
   DFF( vh_68, CLOCK, COUNT_OUT_0) ;

end exemplar ;