You are to extend the DLX MultiCycle Implementation to include the
JALR,JAL, JR instructions. You are also to modify the control so that
the branch delay slot is implemented. This will
affect all branches and jumps.
You are to use the same files you did for the previous simulation.
Copy the following files:
cp ~reese/EE4713/j_test.s vhdl/src/mcyc_test.s cp ~reese/EE4713/j_test.obj vhdl/src/mcyc_test.objThis will overwrite the current 'mcyc_test.s', 'mcyc_test.obj' files with 'j_test.s' and 'j_test.obj'. The 'j_test' program will test your implementation of the JAL,JALR,JR instructions and the branch delay slot. The VHDL configuration 'cfg_mcyc_test' will load the 'mcyc_test.obj' file on startup. To run this configuration, do:
qhsim -lib ../obj/qhdl/dlxmcyc cfg_mcyc_testThe correct register values at the end of the simulation are specified in 'mcyc_test.s'.
You may want to implement the branch delay slot FIRST since any code you add to implement the JR/JALR/JAL instructions will be affected by this. Your basic approach to implement the branch delay slot should be the following:
You can use the old 'acid_test.s' file
to test the basic functionality of the branch delay slot code. You
may want to modify the 'acid_test.s' file to put some meaningful
instructions in the branch delay slots. Remember, you have to execute:
dlx2obj.branch acid_test.sto update the 'acid_test.obj' file if you make modifications to the 'acid_test.s' file. You should always verify that any changes you make to the '.s' files work as expected in 'dlxsim' BEFORE running 'dlx2obj.branch'.
Extending the datapath to handle 'jr', 'jalr', 'jal' instructions is
fairly straightforward. It WILL require modification of 'dlx.vhd'
in addition to 'control.vhd'.
You must turn in a short, typed report that discusses the changes you
made to both the DATAPATH and the CONTROL logic. Include an abbreviated
finite state diagram for your control. It is not necessary to show all
of the signals in your FSM; simply write a short description of what
each state does and show the flow between states. Pay particular care
to the states used for the instructions which you added in this simulation. I also want a
datapath diagram with highlights that show what you added to support
the new instructions. It is not necessary to turn in hardcopy of your
code.
You must also perform the following submission procedure for your code: