EE 4253/6253 Lecture Notes
EE 4253/6253 Principles of CMOS VLSI Design
syllabus.pdf
pages1_thru_9.pdf
pages10_thru_22.pdf
pages23_thru_37.pdf
pages38_thru_45.pdf
pages46_thru_53.pdf
pages54_thru_84 -> layout design rules
pages85_thru_95.pdf
nand-stick-layout.pdf
nor-stick-layout.pdf
D-latch-stick-layout.pdf
pages96_thru_105.pdf
pages106_thru_117.pdf
pages118_thru_132.pdf
pages133_thru_149.pdf
pages150_thru_155.pdf
pages156_thru_163.pdf
pages164_thru_166.pdf
pages187_thru_188.pdf
EE 4253/6253 Labs & Homework
Cadence "helpers" (click-here)
lab_1.pdf
Files to be used with Lab 1:
inv_sub.sp,
inverter_dc.sp,
inverter_ac.sp
lab_2.pdf
Files to be used with Lab 2:
default.sp
lab_3.pdf
lab_4.pdf
lab_5.pdf
Files to be used with Lab 6:
lab6.pdf,
lab6_supp.pdf
lab_7.html
lab_8.pdf
lab_9.pdf
Standard Cell layout example (click-here and view example)
lab_10.html
hmk_4.pdf