------------------------------
-- nfet model
------------------------------
LIBRARY std;
USE std.standard.ALL;
USE work.std_logic.ALL;

ENTITY nfet IS
  GENERIC ( gdelay      : time := 3 ps;
            MaxStrength : t_strength := 'R');
  PORT ( g        : IN    t_wlogic;
         src, drn : INOUT t_wlogic);
END nfet;

ARCHITECTURE nfet_behave OF nfet IS
  COMPONENT bxfr
    GENERIC ( gdelay      : time := 3 ps;
              MaxStrength : t_strength := 'R');
    PORT ( g        : IN    t_wlogic;
           src, drn : INOUT t_wlogic);
  END COMPONENT;
BEGIN
  i1 : bxfr
       GENERIC MAP ( gdelay, MaxStrength)
       PORT MAP (g, src, drn);
END nfet_behave;