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-- NAND gate as a network of Bi-Directional Switches
--
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LIBRARY std;
USE std.standard.ALL;
USE work.std_logic.ALL;

ENTITY nand2 IS
  PORT ( a, b : IN    t_wlogic;
         z    : INOUT t_wlogic );
END nand2;

ARCHITECTURE nand2_bxfr OF nand2 IS
COMPONENT nfet
  GENERIC ( gdelay      : time := 3 ps;
            MaxStrength : t_strength := 'R');
  PORT ( g        : IN    t_wlogic;
         src, drn : INOUT t_wlogic);
END COMPONENT;

COMPONENT pfet
  GENERIC ( gdelay      : time := 3 ps;
            MaxStrength : t_strength := 'R');
  PORT ( g        : IN    t_wlogic;
         src, drn : INOUT t_wlogic);
END COMPONENT;

SIGNAL t2  : t_wlogic;
SIGNAL vdd : t_wlogic := F1;
SIGNAL gnd : t_wlogic := F0;

BEGIN

  vdd <= F1;
  gnd <= F0;

  i0 : pfet PORT MAP ( a, vdd, z);
  i1 : pfet PORT MAP ( b, vdd, z);
  i2 : nfet PORT MAP ( a, z, t2);
  i3 : nfet PORT MAP ( b, t2, gnd);

END nand2_bxfr;