-- 16 bit loadable counter with enable and asynchronous reset
-- Actel Corporation
-- July 25, 2002

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;

entity counter16 is
port (CLK, RESETn, LOAD, ENABLE: in std_logic;
DATA: in std_logic_vector(15 downto 0);
COUNT: out std_logic_vector(15 downto 0));
end counter16;

architecture RTL of counter16 is
signal COUNT_int: std_logic_vector(15 downto 0);
begin

process (RESETn, CLK)
begin
  if (RESETn = '0') then
   COUNT_int <= (others => '0');
  elsif (CLK 'event and CLK = '1') then
  if (LOAD = '1') then
   COUNT_int <= DATA;
  elsif (ENABLE = '1') then
   COUNT_int <= COUNT_int + 1;
  end if;
  end if;
end process;

COUNT <= COUNT_int;
end RTL;