Arithmetic and Logical Circuits
Clocking & Storage Devices
Sequential Circuits
VHDL and Modeling with VHDL
Programmable Logic Devices
Architectural models for Synthesis
Timing Analysis &signal
Integrity
Synthesis Tools and Examples
· Laboratory: Assignments with the VHDL Simulator , SYNOPSIS and CADENCE
· Grading: 20% project, 20% midterm and 60% final exam.
TEXT: Optional
· Application Specific Integrated Circuits. By M.J. Smith, Addison Wesley 1997
·
Computer Arithmetic and Hardware design, 2nd
Edition. By B. Parchami, Oxford, ISBN
8978-0-19-532848-6
Other books of interest are:
Principles of CMOS VLSI Design, By N. Weste, and K. Eshraghian, Addison wesley,
It's only VHDL (But I like it), By: T. S. Obuchowicz,
Pearson Custom Publishing
VHDL Manual, Tutorial Papers
· Objectives: The aim of this course is 3 folds: first to introduce the students to Digital Design process for combinational as well as sequential circuits. Second motive is to introduce the High Level Descriptive Languages and modeling digital circuits with VHDL. Finally the introduction of the Synthesis process and the use of synthesis tools to gain confidence in the art of using CAD tools for synthesis of digital circuits.
· home
page: http://www.ece.concordia.ca/~asim
Disclaimer: "In the event of extraordinary circumstances beyond the University's
control, the content and/or evaluation scheme in this course is subject to change".