PowerCalc : Power Calculator for COMPASS

A more accurate method for average dynamic power estimation of CMOS circuits is based on node toggle counts obtained from simulation with typical input patterns. COMPASS is working on a power calculator module integrated in Qsim, but the module is not available yet. However, the node toggle counts and capacitances as the basic information for an exact power calculation are easily accessible within Qsim.

The power calculator PowerCalc described in the sequel extracts this information from Qsim simulation output and computes the average power consumed by wiring and cell instances for the whole circuit, for parts of the circuit, and for individual nodes and instances. Additionally, the program allows the estimation of the power dissipated by glitching transitions. Transition activities and the controllability coverage are given as well. Various standard cell and pad libraries (`cmn..' by VLSI, Passport by COMPASS) are included.

How PowerCalc Works

tot. power dissipation per cell = [P (value from data sheet) + (VDD^2 * Cext)] * F
Cext = load capacitance in pF for each cell
P = power in uW/MHz
F = output switching frequency in MHz

1. A simulation with typical input patterns is written for circuit simulation in COMPASSqsim.
2. The shell script `powershell' runs the simulation and the following commands in COMPASSqsim in order to obtain all information required for power calculation: "show capacitance *" lists all node names and capacitances, "show toggles *" (resp. "show toggles node_list") lists the number of up-transitions for all (resp. selected) nodes, and "show instances *" lists all instance cell types and output node names. The script then calls the power calculator program `powercalc', which performs all remaining steps.
3. Node and instance information is read from the simulation log file. Cell power values and cell output capacitances are read from a library file.
4. The node capacitances are reduced by the capacitance of the cell outputs which drive that node, because cell output capacitances are already included in the cell power values.
5. Wiring power is computed by multiplying the node capacitance by the up-transition count for each node. The sum over all nodes is then multiplied by VDD^2 and divided by the simulation time, which gives the total average wiring power in [uW] or [mW]. The node up-transition count divided by the simulation time gives the node's transition activity per microsecond [1/um]. The percentage of controlled nodes (i.e. nodes with at least one up-transition and one down-transition) is also given. This controllability coverage represents an upper limit for the achievable fault coverage for the given circuit and simulation.
6. Cell power is computed by multiplying the cell power value (from the data sheet) by the up-transition count of the most active output node for each cell. The sum over all cells is divided by the simulation time and gives the total average cell power.
7. Total average power dissipation is the sum of wiring power and cell power (in [uW] or [mW]).
8. Power consumed by glitches (i.e. two transitions that cancel each other but are counted as toggles by Qsim) can be computed optionally (glitching power). This requires the output of static node value information in form of one vector of all nodes per cycle in a trace file. The program then extracts the "static" node up-transition count which is subtracted from the total ("dynamic") up-transition count to get the amount of glitching up-transitions. The same power calculation as described above is performed for glitching up-transitions, resulting in a glitching power estimation.

The PowerCalc Package

Executables:

`powershell'

Shell script for automatic computation of the power dissipation by running a simulation (Qsim in `vlsishell') followed by the execution of the `powercalc' program.

`powercalc'

C program which performs power calculation as described above (is compiled automatically when running `powershell'). It takes the simulation log file and trace file as input.

`powerlib'

Shell script for specifying the used libraries.

`powerstimulus'

Simple example perl script for automatic generation of a simulation file with random input stimuli.

Libraries:

Library files for the following standard cell and pad libraries are included:

cb50hd130 cb50hp130 cb50io120
cb60hd130 cb60hd230 cb60hp130 cb60hp230
cb60io120 cb60io150 cb60io220 cb60io230
cb80hd130 cb80hd230 cb80hp130 cb80hp230
vsc653l vsc670 vsc670l
vsc450 vsc450l vsc470 vsc470l vsc4p02
vsc350 vsc370 vsc3p02

Documentation

`powercalc.ps'

Postscript file of this document.

`README'

Installation and usage information.

`powercalc.c'

Implementation details of `powercalc'.

`powershell', `powerlib'

Running `powershell' and `powerlib' with no arguments prints out a detailed usage message.

Downloading

Download `powercalc.tar.gz' (version 2.1) and unpack it (`gunzip powercalc.tar.gz' and `tar xvf powercalc.tar' will create a directory `powercalc' with everything in it). Read the installation and usage instructions in the `README' file.

Remarks

• For power calculation without glitching power, any simulation file will do.
• External capacitances can be included in the power calculation by adding additional capacitances in the simulation file or in the schematic.
• Average power can be calculated for entire circuits as well as for subcircuits (specified by a list of nodes) and individual nodes and cell instances.
• Power is computed under the worst case conditions specified in the corresponding library data sheets (section "Power" -> "Worst-Case Power Conditions").
• The power consumption of synchronous CMOS circuits is linearly dependent on the operating frequency. Thus, the obtained power numbers are linearly scalable to any other operating frequency. Power dissipation at different supply voltages can be derated by the scaling factors given in the data sheets (section "Power" -> "How To Derate Power Dissipation").
• Macrocells and datapath elements can be included in the netlist, but no cell power is calculated for them. All cells not contained in the library file are listed by the program with their output up-transition count. Power for these cells can be calculated easily by multiplying the given up-transition number by the appropriate power number [uW/MHz] from the data sheet. This power calculation method, however, may be very inaccurate for macrocells.
• The accuracy of the used calculation method is quite high (if actual wiring capacitances are used), but limited by the accuracy of the simplified cell power model. This model assumes the cell power to scale linearly with the output toggle frequency. This includes the following limitations: complex gates having internal nodes with different toggle frequencies (e.g. clock buffers of flip-flops), gates with more than one output (which output is relevant?), and varying crossover currents (e.g. dependent on input signal rise and fall times).

Bugs, Debugging, Support

• The program was not intensively tested and thus may contain bugs. However, exhaustive file format checks and error conditions should the program prevent from providing the user wrong results. If error messages or bugs occur, please report them to me.
• In debug mode (option -d), internal data is written out to a file and can be inspected for correctness.
• Any kind of comments, critical questions and enhancement requests are welcome, as well as new library files which can be included in this package.
• If you want to be updated about new versions and stuff, send me an e-mail.